Certain types of computers employ a display controller to form alphanumeric characters or graphics images (hereinafter referred to as "symbology") on a display screen. A complete rendering of the symbology on the display screen represents an image frame. Display images are formed by rendering successive image frames on the display screen at a frequency of between 60 and 80 Hertz.
The symbology in an image frame are rendered in accordance with display data that are stored in a frame buffer memory. The frame buffer memory may be a dedicated display system memory circuit or a preassigned portion of the main memory circuit in the computer. The frame buffer memory receives and stores display data generated by, for example, the main or host microprocessor in the computer.
Symbology are rendered on the display screen as selected ones of multiple pixels, which are arranged in an array of rows and columns on the display screen. Each pixel is represented by display data stored at one or more corresponding address locations in the frame buffer memory. The brightness or color of the pixel in an image frame corresponds to the value of the display data stored at the address locations. As a result, the address locations in the frame buffer memory are arranged in accordance with the arrangement of pixels on the display screen and thereby provide a pixel-by-pixel mapping of the display data in the frame buffer memory. The arrangement of the address locations in the frame buffer memory is called the frame buffer memory configuration.
One group of computers that employ a pixel-by-pixel mapping of display data in frame buffer memory is, for example, the Macintosh.RTM. series of personal computers manufactured by Apple Computer Corporation of Cupertino, California. The host microprocessor in a Macintosh.RTM. computer is connected directly to the address inputs of the frame buffer memory, thereby to provide the microprocessor with high speed access to the address locations. The direct access of the host microprocessor to the frame buffer memory allows the microprocessor to generate the display data corresponding to the symbology in each image frame.
The direct access is provided by fixed (i.e. "hard wired") connections between the host microprocessor and the frame buffer memory address inputs. The fixed connections provide a corresponding fixed frame buffer memory configuration. To provide alternative frame buffer memory configurations, alternative fixed connections are established between the host microprocessor and the frame buffer memory.
For example, the Macintosh.RTM. II computer includes six expansion slots that allow the computer to be expanded to include additional circuitry, such as a display controller having a frame buffer memory that employs a preselected frame buffer memory configuration. Such an option would include a dedicated frame buffer memory circuit having fixed connections that correspond to the preselected frame buffer memory configuration. The fixed connections would terminate at a computer data bus connected to the expansion slot, thereby to allow the host microprocessor to access the dedicated frame buffer memory circuit in accordance with the alternative frame buffer memory configuration.
Each one of multiple alternative frame buffer memory configurations would require a corresponding memory circuit connected to a different expansion slot. Implementing multiple alternative frame buffer memory configurations in such a manner would be undesirable because it would include redundant circuit components and would, therefore, be relatively expensive. Moreover, such an implementation would allow only a limited number of alternative frame buffer memory configurations and would, therefore, be relatively inflexible.
Alternative frame buffer memory configurations could also be generated with a graphics controller integrated circuit of the HD63484 type manufactured by Hitachi Corporation. A graphics controller of this type employs a dedicated, programmable processor that could implement alternative frame buffer memory configurations. In a computer having a host microprocessor that employs direct access to the frame buffer memory, such a graphics controller would interfere with the direct access and would, therefore, be incompatible with the operating system software that controls the graphics operations of the host microprocessor. Moreover, the graphics controller would include many features and capabilities that are programmed into the operating system of the computer, thereby resulting in an inefficient circuit design.